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Reply to @me_@sueden.social
David Chisnall (*Now with 50% more sarcasm!*)@david_chisnall@infosec.exchange (2026-08-24 23:52:54)
@me_ @krono @whitequark 

As I recall, the main difference was more FPU pipelines (one per core rather than a shared one?).  It looked like a fairly minor tweak.
---Reply---
Sun Microdevil Pte Ltd@koakuma@uwu.social (2026-08-26 00:59:43)
@david_chisnall @me_ @krono @whitequark Also, longer pipelines on the T2/T3 cores

As an aside, the T1-T3 generation has this annoying combination of no branch predictors and pipelines long enough that the BDS can't cover the branching bubble

I mean given that the ISA (fortunately!) has conditional moves you can work around it to some degree by preferring cmovs and avoiding branches unless absolutely needed but still a pain when deciding how to tune things when compiling binaries haha